An Ultralow Specific On-Resistance 200V LDMOS for Voltage Extension of a 0.18µm BCD Process

This paper proposes a 200V triple reduced surface field (RESURF) lateral double-diffused MOSFET (LDMOS) for voltage extension of a 0.18µm Bipolar-CMOS-DMOS (BCD) process. Compared with the conventional single RESURF LDMOS, this novel structure features an n-p-n layer in the drift region, which can decrease the specific on-resistance (R
on,sp
) without sacrificing the breakdown voltage (V
B
) of power devices. By optimizing the charge balance among n-type drift region, n-p-n layer and P-epi, the fabricated device successfully obtains an experimental V
B
of 258 V when the drift region length (L
D
) is 14 µm and the corresponding R
on,sp
is 509 mΩ•mm
²
, which is more competitive than other reported devices with the same operating voltage level. Furthermore, the measured I
DS
-V
DS
characteristic of this device also exhibit a good safe operating area (SOA).