Time Delay Unit Architecture Optimization for Phased Antenna Arrays Using Integer Linear Programming

A systematic method for optimizing the time delay unit architecture (TDU-A) of a phased antenna array (PAA) is introduced. The problem is cast in the standard form of integer linear programming optimization with an objective function that targets minimizing the total number of TDUs within the RF fan-out while maintaining phase error and manufacturability constraints. The presented optimization method can reduce the cost, power, and complexity of a broadband PAA in contrast to prior methods that converge on a manufacturable architecture without considering the total number of TDUs. Three optimization examples are presented with a requirement of a maximum of 5° phase error. These examples clearly show that there are many TDU-As that can satisfy the phase error requirement, yet only one architecture is superior by exhibiting the minimum number of TDUs. The superior architecture is highly likely to be missed in a traditional design approach that places the TDUs in the RF fan-out as close as possible to the antenna elements if the presented optimization approach is omitted.