Experimental Fault Rate Characterization and Protection in Embedded RRAM

Resistive Random Access Memory (RRAM) is a process and voltage compatible embedded nonvolatile memory with high density. Embedded non-volatile memory has gained interest as a dense embedded memory consuming near-zero leakage power and enabling higher on-chip capacity. These properties are particularly interesting for overcoming the main-memory bottleneck in resource-constrained systems. Unfortunately, RRAM faces new challenges traditional charge-based memories have avoided. In this work, we characterize the impact of faults in RRAM and explore various forming procedures to mitigate high fault rates. We implement two error correction techniques to eliminate fault-induced errors and evaluate area overhead. We demonstrate how the combination of these methods can achieve a 1516.4 times reduction in faults over prior work.