The Bitmap Decryption Model on Interleaved SRAM Using Multiple-Bit Upset Analysis

Static random access memory (SRAM) with an interleaved bitmap design is of special concern for space applications because the interleaving architecture improves the efficiency of error correction code for single-event upsets (SEUs) in a harsh radiation environment. However, most of the interleaving layout is kept unreleased from the manufacturer, and determining the interleaving parameters of an intact SRAM is a challenge for the radiation hardening system. This work proposed a theoretical decryption model of conventional interleaved bitmaps based on the principle of multiple-bit upset (MBU) correlation analysis. The decryption method was practically implemented with a commercial SRAM, and its unknown interleaving architecture was resolved by the spatial correlation and MBU distance upon SEU fault injection attack with ²⁵²Cf source. The disclosed interleaving architecture, the subbyte characteristics, and the bit subblock distribution of the device under test (DUT) are in good agreement with the bitmap obtained with SEU mapping of the microbeam. This work demonstrates the valid and robust SRAM layout decryption model and provides a viable approach for evaluating correction efficiency and component reliability in the radiation hardening system.