An Efficient Cryptography VLSI Design for Data Security

An electronic data encryption standard is known as Advanced Encryption Standard (AES). This standard is used in both software and hardware, and today it is one of the most widely used encryption techniques. Implementation of asymmetric cryptography algorithm with good security on a field-programmable gate array (FPGA). An 8-bit data channel as well as five primary blocks are included in the proposed architecture. In our project, to keep plaintext, keys, and intermediate data create two separate register banks Key Register and State Register. Shift Rows are integrated into the State Register to save space. This research work proposes an efficient block of 8-bit with four internal registers to take and send an 8-bit data to fit the Mix Column to an 8-bit data path. Advanced shared Sub-Bytes are also used for the key expansion and encryption process.