Machine learning Assists on High Aspect Ratio Slit Trench Etching in 3D NAND

Control of slit bottom critical dimension (BCD) and the depth of etched recess upon underlying first polysilicon (PL) layer are important to avoid the slit patterns collapsing during the CMOS under array (CuA) type 3D NAND manufacturing. In this paper, we presents a case study to describe how machine learning assists on high aspect ratio deep trench etching under considering overall uniformity across the wafer. The machine learning model created through Neural Network (NN) modeling based on an etch starting baseline enables to predict desired slit BCD and the depth of PL recess locally on the center/middle/edge of the wafer from known process database including numerous process variants and etching profiles. The accuracy is at least >92% between the actual results and the predicted profile from the NN model we trained and validated. At the earlier stage, even if the modeling database size is limited, we still can apply it to reduce the turnaround time of etch development and work out a clear tuning trend through a series of virtual profile prediction and validation during NN modeling.