FPGA Implementation of Multiple Low-Rate Sampling Composite Detector

Multiple low-rate sampling (MLRS) techniques can detect specific wideband signals using an effective sampling rate lower than what is required by the Nyquist-Shannon theorem. This paper presents a two-channel MLRS receiver implemented with off-the-shelf analog-to-digital converters and an FPGA. Fixed-point computations are used to reduce computational costs and overall complexity is reduced by using a composite detector based on a single threshold derived from the multiple spectral dominant parts of a signal. Applying two matched filters but using one modified threshold increases the probability of detection while compensating for the increased false alarm rate. The detector is evaluated using emulated analog signals obtained from electromagnetic-simulated target responses.