Efficient Memory Access-Aware BWA-SMEM Seeding Accelerator for Genome Sequencing

Next-generation sequencing motivates the research of FPGA acceleration for genome sequencing algorithms. Read alignment is a time-consuming step in genome sequencing analysis. The most widely used software for read alignment, BWA-MEM, is based on the seed-and-extend paradigm. The seeding step, BWA-SMEM, is a major bottleneck, contributing ~40% to the overall execution time of BWA-MEM2, the fastest available implementation of BWA-MEM, when aligning whole human genome reads from the Platinum Genomes dataset. But its FPGA acceleration has not been well studied, because the fundamental challenge of accelerating the SMEM algorithm is to handle its large volume of random memory accesses. The development of FPGA platform with multiple memory channels motivates the BWA-SMEM seeding FPGA accelerator. However, the state-of-the-art SMEM accelerator either replies on some specific FPGA platform, which is specific and unfit for common FPGA platforms, or is designed based on a new algorithm equivalent to BWA-SMEM. Therefore, we propose an efficient memory access-aware BWA-SMEM seeding accelerator, aiming at common FPGA platform with multiple memory channels. We compress the SMEM data first and interleave it to multiple FPGA memory channels. Our accelerator adopts several memory access-aware optimizations to exploit the localities supplied by our data organization. We implement the accelerator based on a common FPGA platform with a Xilinx FPGA chip. Experiments on the FPGA platform show that, compared with the optimized software, run on a workstation with 16-thread Xeon CPU, our accelerator gains from 2.19 to 2.32 speedups. Soft cycle-accurate simulation shows our memory access optimizations make great contributions to the performance. Furthermore, our accelerator has good portability and expansibility.