A 1.8GΩ-Input-Impedance 0.15µV-Input-Referred-Ripple Chopper Amplifier with Local Positive Feedback and SAR-Assisted Ripple Reduction

Many sensors exhibit output impedances greater than a few MΩ, and the subsequent instrumentation amplifier (IA) must be carefully designed to meet the requirements of high input impedance
$(\mathrm{R}_{\text{in}})$
, low noise and low offset. Chopping is a power-efficient technique to achieve low offset and low 1/f noise without noise aliasing [1]–[4], but at the expense of a lower
$\mathrm{R}_{\text{in}}$
(10–100MΩ [1] [4] [5]). Positive feedback loop (PFL) can boost
$\mathrm{R}_{\text{in}}$
of a capacitively-coupled chopper IA (CCIA) by providing a large portion of input source current [4]. However, in practice, the PFL is not suitable for a generic chopper amplifier to achieve a high
$\mathrm{R}_{\text{in}}$
above
$100\text{MO}$
, because the actual impedance boosting factor highly depends on the absolute accuracy of the feedback elements and the overall gain of the IA. For instance, to compensate input parasitic capacitance of 100fF by the PFL, an IA with a voltage gain of 100 requires a very small feedback capacitor of 1fF. Meanwhile, this feedback capacitor must be reconfigured with different IA gains. For the same reason, the PFL is not applicable to a chopper operational amplifier (OPA) either due to its ill-defined open-loop gain. Apart from the limited
$\mathrm{R}_{\text{in}}$
, chopper amplifiers also suffer from output ripple, i.e. the up-modulated offset. Prior art ripple reduction loop (RRL) can realize a sub-µV residual input referred ripple [1] [3], but this often involves an active loop integrator with large DC gain and time constant, resulting in power and area overhead.