Design of Continuous-Time ΣΔ-modulator With Single-Bit Quantizer With Hysteresis Operating at Limit Cycle

This paper presents a novel design methodology of a Continuous-time ΣΔ-Modulator operating at a limit cycle. The methodology employs both the describing functions linearization method and the out-of-band gain theory to find the parameters of the loop filter. As a result of the unification a single mathematical description of the loop requirements is obtained as a system of inequalities. Each of the solutions of the inequalities represents a possible modulator. An example is provided to demonstrate the design process.