Compact 232–250-GHz Traveling-Wave Frequency Doubler With Peak Output Power of 5.2 dBm and Efficiency of 2.9%

A 232–250-GHz traveling-wave frequency doubler is presented using a 250-nm InP double heterodyne bipolar transistor (DHBT) technology. Compared to the previous traveling-wave structures, the proposed frequency doubler employs physical open at the end of the input feed line, thus minimizing the input signal leakage and avoiding the crossover of the output signal line. In addition, the output power is maximized by load–pull matching at the 2nd harmonic while the fundamental suppression is enhanced by phase compensation of the differential signal. The frequency doubler exhibits peak output power of 5.2 dBm at 240 GHz with a conversion gain of −4.3 dB and overall efficiency of 2.9%. The 3-dB bandwidth for output power is from 232 to 250 GHz. The fundamental suppression is 25 to 33 dB over the bandwidth. The chip size is as small as
$443 \times536\,\,\mu \text{m}^{2}$
owing to the traveling-wave structure requiring no balun.