Low-Power Rail-to-Rail Comparator in 130 nm CMOS Technology

The paper addresses a novel comparator topology capable of processing the input signal in rail-to-rail range, designed in standard general purpose twin-well nanoscale CMOS technology without two differential input pairs. The power supply voltage of 1.2 V was used and the operating temperature span was set to a standard industrial limits (from −20 °C up to 85 °C). Its application is aimed to low-power energy harvesting circuit, therefore its current consumption has been minimized as much as possible, since it stands out as a crucial parameter. The presented topology operates in so-called current-mode and represents a gate-driven version of already published topology, which was described in deep detail in [1]. The designed comparator has been verified for robustness and accuracy across all process and temperature corners, as well as by the Monte-Carlo analyses. Its power consumption does not exceed
$1.05\ \mu\mathrm{W}$
in worst-case scenario, while in the nominal conditions, the value remains safely in the first half of nW range. The topology also shows great potential for low-voltage applications, as well since it employs only two stacked transistors.