Impact of Electrical Defects located at Transistor Periphery on Analog and RTN Device Performance

In this work, analog and RTN performance of transistors operating in low current conditions were reported. In subthreshold regime the RTN signal is driven by defects located at the STI edges. Experimental data show that reducing the amount of electrical impurities present at the device periphery, lead to RTN improvement without changing neither the transistor targeting nor its reliability. Furthermore, the transistor noise sensitivity to temperature and body bias are decreased. Empirical correlation between RTN and intrinsic gain is also discussed, which can be employed for fast inline process monitoring of defects present at the STI edges.