Experimental Demonstration of Holey Silicon-Based Thermoelectric Cooling

Here, we demonstrate holey silicon-based thermoelectric cooling devices using simple fabrication processes and evaluate their cooling performance using infrared thermography. While lateral thermoelectric coolers require a suspended structure and thermal isolation for optimal performance, our design simply combines a silicon device layer with an insulating Pyrex substrate and enables demonstration of thermoelectric cooling by holey silicon even on a bulk heating stage instead of a local hot spot. Our work shows that holey silicon with
$1.9~\mu \text{m}$
wide necks and 21
$\mu \text{m}$
deep trenches provides a temperature reduction of 1.2 °C over a 300
$\mu \text{m}\,\,\times $
300
$\mu \text{m}$
area when the underlying heating stage is set to keep the background at
$100~^{\circ }\text{C}$
. Our model attributes the cooling performance to the unique thermal anisotropy of holey silicon and predicts greater performance with deeper holey silicon trenches, smaller holey silicon necks, and higher background temperatures or stronger heating. These findings indicate holey silicon-based thermoelectric cooling can be very useful for thermal management of various electronic devices and handling on- chip hot spots.