The Device and Circuit Level Benchmark of Si-Based Cold Source FETs for Future Logic Technology

Si-based cold source field-effect transistor (CSFET) combines the benefits of sub-60-mV/dec steep-slope switching, high
${I}_{ \mathrm{\scriptscriptstyle ON}}$
current, and compatibility with current Si CMOS process technology. Therefore, it is a promising candidate for future energy-efficient logic technology. For the first time, we present device and circuit benchmark of Si-based gate-all-around (GAA) CSFET versus conventional GAA MOSFET. The device’s characteristics are first generated using a calibrated multiscale TCAD framework. Then a novel SPICE device compact model based on neural network is created to capture the unique CSFET
${I}-{V}$
and
${C}-{V}$
data with high precision. This SPICE model further enables the circuit benchmark simulations. Through this approach, it is identified that compared with GAA MOSFET, Si-based GAA CSFET shows up to 67% performance/power gain for a supply voltage (
${V}_{\text {dd}}$
) below 0.43 V in an ideal gate-loaded ring oscillator circuit. It is 70% more energy-efficient in the capacitive-loaded fan-out of 4 (FO4) inverter circuit. Finally, the comparisons of GAA CSFETs with different nanosheet widths are accomplished for design technology cooptimization (DTCO) purpose.