An Analog EIC-PIC Receiver With Carrier Phase Recovery for Self-Homodyne Coherent DCIs

Coherent techniques, used for high-capacity optical links, conventionally use high-speed ADCs and digital signal processing, which make them power hungry. For short-reach coherent links such as data center interconnects, power consumption, form factor, cost, and latency have to be greatly reduced. Co-designed photonic and electronic integrated circuits, in the optical and electrical analog domains, respectively, can achieve these goals. In this brief, for the first time, we present integration of a silicon photonic integrated coherent receiver (ICR) front-end with an electronic carrier phase recovery chip, as a part of a complete coherent receiver solution. A phase shifter in the ICR (fabricated in a 220 nm silicon-on-insulator technology) receives feedback from the CPR chip, and the combination compensates for the time varying phase offset between the modulated signal and the unmodulated carrier in the closed loop configuration. In this proof-of-concept demonstration, we present experimental results obtained from the stand-alone ICR, and its system level integration with CPR chip, for QPSK signals. The technique can be extended to a higher-order modulation formats, such as 16-QAM, for capacity scaling. The proposed scheme is suitable for carrier-forwarded coherent links, such as polarization multiplexed carrier based self-homodyne links.