Design and Analysis of 7nm FinFET Full Custom Standard Cell Library using ASAP7 PDK

This paper describes the construction of 7nm FinFET full custom standard cell library, and hence evaluating the performance based on various parameters. The ASAP7 PDK is used as it is open-source tool provided by Arizona state University. The library consists of basic gates with variable inputs and load driving force. Layouts are optimized in a very predictive manner to increase performance and get desired applications. Given also is a brief definition of process on how to make standard cells using a PDK. A continuous effort was made to reduce the area occupancy of the standard cell to minimum as to get maximum parametric performance.