A preamplifier circuit with offset-voltage control technique for 50-Gb/s CMOS PAM4 receiver

In recent years, the bandwidth required for highspeed optical communication systems have increased, and PAM4 transmission system has been introduced, which has twice the bandwidth of the NRZ transmission system. In the PAM4 receiver, there is an issue that demodulation cannot be achieved when the offset voltage of the preamplifier output is deviated from the appropriate level. In this work, we adopt the preamplifier for PAM4 receiver, which can optimize the offset voltage of the preamplifier output. We designed 50-Gb/s PAM4 receiver circuit with 65nm CMOS and investigated the operation characteristics. By the post-layout simulation, we have confirmed that the eye opening area of the receiver output has been increased by 48 % compared to the conventional circuit.