Hardware-in-the-Loop Simulation for Satellite System Verification

The satellite simulator platform is necessary for the satellite development. It is an essential tool to verify the operations of flight software. The Controller-in-the-Loop simulation with Simulation Third Generation (SimTG) existing at Thailand’s Geo-Informatics and Space Technology Development Agency (GISTDA) can help verify the flight software along with the on-board computer (OBC). However, it is rather rigid and cannot adjust other devices arbitrarily. This paper presents the requirements of the Hardware-in-the-Loop Simulation (HILS) platform along with the proposed solution to solve this problem. The interface module is developed by using the Python EtherSpaceLink-API along with socket programming. The essential tool in the development is the Parsl, which is a promising Python parallel library. The experimental testing of the proposed HILS is done by using a cloned simulator working as physical devices. Then, the response times are measured adjusting the frequency of the flight software. The proposed design achieved the expected results, respecting to the Controller-in-the-Loop simulator.