Carrier Trapping Effects on Forward Characteristics of SiC p-i-n Diodes Fabricated on High-Purity Semi-Insulating Substrates

Carrier trapping effects of high-concentration deep levels in high-purity semi-insulating (HPSI) silicon carbide (SiC) substrates on device characteristics were investigated. Vertical p-i-n diodes were fabricated on HPSI 4H-SiC substrates with ion implantation processes. The fabricated diodes showed good rectification. The experimental forward current–voltage (
${I}$
–
${V}$
) characteristics were analyzed by using drift-diffusion (DD) simulation that considers deep levels both as recombination centers and carrier traps. The DD simulation revealed that high-concentration carrier traps flatten the potential distribution in the i-type region and, therefore, increase the recombination current and ideality factor in the low-bias region. The simulated
${I}$
–
${V}$
characteristics assuming a high trap density of
$5 \times {10}^{16} \mathrm { \text {cm}^{-{3}}}$
showed good agreement with experimental ones in the temperature range of 295–600 K.