Design and implementation of dynamic phase adjustment technology based on delayed phase-locked loop

Dynamic phase adjustment technology is a key technology in communication. In high-speed data transmission interface, due to the narrowing of the data window and inconsistent transmission paths, resulting in data and clock signal receiver bit offset and word offset. In order to avoid the instability of received data, a dynamic phase adjustment scheme based on delayed phase-locked loop is proposed in this paper. The scheme innovatively uses two channels of delay PLL, one of which monitors the adjustment results and supports up to 64 channels of data alignment. The circuit can meet the maximum transmission rate of 38.4Gbps, and can tolerate a certain degree of input jitter, the designed circuit can work stably in the actual communication link, can effectively solve the actual clock and data phase offset problem.