Gate Driver Circuit Based on Depletion-Mode Indium-Gallium-Zinc Oxide Thin-Film Transistors Using Capacitive Coupling Effect

This article proposes a highly reliable gate driver circuit based on amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs). The proposed circuit adopted an additional boosted-down structure to maintain the control node (Q-node) of the output TFTs at a low voltage level using the capacitive coupling effect instead of the TFT structure. Consequently, the proposed circuit exhibited stable operation for depletion-mode TFTs with a threshold voltage (
${V}_{\text {TH}}$
) of −3 V. The boosted-down structure improved the operation reliability because it reduced the current flow from Q-node to low-level voltage node by removing the continuously degraded TFTs. The drain–source voltage (
${V}_{\text {DS}}$
) stress on the TFTs connected to the Q-node was reduced by separating these TFTs from the Q-node during bootstrapping. The
${V}_{\text {DS}}$
value during Q-node bootstrapping was reduced from 44.3 to 27.3 V. A pull-down TFT was designed to operate with a 50% duty ratio to ensure reliability against the bias stress. The output node was discharged by the Q-node discharging TFTs in the next stage during the remaining 50% period. Therefore, the output node was discharged with a total duty ratio of 100%. The proposed circuit operated stably as a shift register with
${V}_{\text {TH}}$
varying from −3 to 9 V. Consequently, using capacitive coupling effect, the proposed circuit exhibited reliable operation with depletion- and enhancement-mode a-IGZO TFTs.