Can We Trust Undervolting in FPGA-Based Deep Learning Designs at Harsh Conditions?

As more neural networks on field-programmable gate arrays (FPGAs) are used in a wider context, the importance of power efficiency increases. However, the focus on power should never compromise application accuracy. One technique to increase power efficiency is reducing the FPGAs’ supply voltage (“undervolting”), which can cause accuracy problems. Therefore, careful design-time considerations are required for correct configuration without hindering the target accuracy. This fact becomes especially important for autonomous systems, edge computing, or data centers. This study reveals the impact of undervolting in harsh environmental conditions on the accuracy and power efficiency of convolutional neural network benchmarks. We perform comprehensive testing in a calibrated infrastructure at controlled temperatures (between –40 $^{\circ }$∘C and 50 $^{\circ }$∘C) and four distinct humidity levels (50%, 60%, 70%, and 80%) for off-the-shelf FPGAs. We show that the voltage guard-band shift with temperature is linear and propose new reliable undervolting designs providing a 65% increase in power-efficiency Giga-OPs per second (GOPS/W).