A 128kb Stochastic Computing Chip based on RRAM Flicker Noise with High Noise Density and Nearly Zero Autocorrelation on 28-nm CMOS Platform

In this work, a 128kb RRAM flicker noise based Stochastic Computing (SC) chip is demonstrated on 28-nm HKMG CMOS platform for the first time. Flicker noise in RRAM is selected as the entropy source owing to the higher noise density compared with the conventional logic devices, even the advanced 14-nm FinFET. The reliability of the flicker noise in RRAM is further improved by an optimized weak forming scheme at the array level towards accurate and stable SC applications. Moreover, a probability modulated true random number generator (PM-TRNG) circuit is proposed to generate stochastic bit-streams (SBS) with the desired probability and eliminated correlation. The autocorrelation function (ACF) and NIST testing results show that the correlation of output SBS is nearly zero. Finally, this RRAM-flicker noise based SC chip is successfully implemented for edge detection in image processing system and extremely low error rate (3.13%@128 BSL) can be achieved.