Design Technology Co-Optimization for Cold CMOS Benefits in Advanced Technologies

Cold CMOS (CMOS circuits operated at 77K, usually obtained by liquid cooling system) is a feasible technology to obtain high performance computing (HPC) or power reduction by offering a reliable way for a steeper subthreshold slope (SS). Other benefits including higher mobility, metal lines with lower resistance, and enhanced reliability also provide opportunities to redesign the architecture for Cold CMOS. In this paper, we focus on DTCO (design-technology co-optimization) and PPA (power-performance-area) analyses for memory cells and their peripherals to maximize the PPA benefits from Cold CMOS at the system level.