3D Sequential Process Integration for CMOS Image Sensor

We developed a new structure of pixel transistors stacked over photodiode named “2-Layer Transistor Pixel Stacked CMOS Image Sensor” (2-Layer Pixel). It was fabricated by 3D sequential process integration with new process techniques, such as thermally stable wafer bonding and deep contacts. With this technology, we successfully increased AMP size and demonstrated backside-illuminated CMOS image sensor of
$6752 \times 4928$
pixels at 0.7um pitch to prove its functionality and integrity.