Design Challenges and Solutions of Emerging Nonvolatile Memory for Embedded Applications

Emerging Memory such as STT-MRAM, RRAM and PCRAM, are attractive candidates to replace the conventional flash memory for embedded applications. The key challenges of these new concepts include small read window, large write current, write endurance and data retention. Moreover, the data retention during the process of soldering reflow (260°C/90s), wafer-level chip-scale package (WLCSP, 340°C/3 hours) and the magnetic field interference to STT-MRAM are the additional challenges for these new NVM concepts. To address these challenges, several design solutions based on the technology-design-co-optimization (TDCO) were proposed, including smart write algorithm with process-temperature-location compensation scheme for write, smart trimming of sensing circuits for read, high-retention OTP-like write scheme, etc. By using these TDCO solutions, both STT-MRAM and RRAM have demonstrated an excellent manufacturability with a competitive PPA, reliability and a reliable approach to retain the data during soldering reflow and WLCSP.