Geometric Variability Aware Quantum Potential based Quasi-ballistic Compact Model for Stacked 6 nm-Thick Silicon Nanosheet GAA-FETs

Quantum-corrected quasi-ballistic compact model is developed for Stacked Silicon Nanosheet (SiNS) Gate-all-around (GAA) FETs. Theories of Density-Gradient-Poisson (DG-P), Singular perturbation and quasi-ballistic to interpret quantum mechanicals on density profile and charge transport are employed in analytical expressions of current, terminal charge and trans-capacitance. Besides, the model incorporates ultra-scaling induced subthreshold degradation and is rigidly verified by comparing to 6-nm-thick-SiNS based experiments (of both
${P-}$
and
$N$
-GAAFET) and GTS simulations (of down to 15 nm channel length). Instead of classical Schrodinger-Poisson theory, it holds features of computation-efficiency and SPICE-compatibility. Especially, awareness of geometric variability enables performance and reliability assessments that statistical effects of stacked nanosheets on on-state voltage are predicted. Hence, this high-efficient quantum corrected model is promising in designing integrated circuits and developing a geometry aware design-technology co-optimization flow in the next generation technology node.