Enabling RRAM-Based Brain-Inspired Computation by Co-design of Device, Circuit, and System

In this work, we discussed the critical challenges, key enabling techniques, and future trends on developing RRAM-based brain-inspired computation, including computing-in-memory (CIM) and neuromorphic computing (NC), from device, circuit to system. To suppress the device non-idealities in the synaptic array, we proposed using optimized bit-cell design and computing approach to reduce the errors and power of the analogue multiply-and-accumulate (MAC). To lower the neuron power, we proposed the sparsity-aware analog-to-digital converter (ADC) for artificial neural networks (ANNs) and highlighted the energy- and area-efficient bio-plausible neurons based on NbO
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devices for spiking neural networks (SNNs). On this basis, we introduce several RRAM CIM designs, followed by a discussion on the remaining challenges and future trends.