Circulating Current Mitigation in Parallel Inverters by Dynamic Carrier Changing Technique

The need for increasing the power capability of a power electronic converter system requires inverters to be connected in parallel. Circulating current flows between the inverters due to voltage difference, which is created in the parallel inverters, when operated with (i) unequal power levels, (ii) interleaved carriers and (iii) hardware asymmetries. The performance of the parallel system is adversely affected when inverters draw circulating current in addition to the load current. To mitigate this circulating current, a novel dynamic carrier changing technique is presented in this paper, when modulating the parallel inverters with interleaved carriers. The circulating current flow is proportional to the inverter’s Common-Mode Voltage Difference (CMVD). This difference can be reduced by using the proposed technique, where carriers of each phase of the inverter are changed based on the fundamental modulating signals. The proposed hybrid PWM method can mitigate the circulating current without affecting the load current ripple. Mathematical modeling is presented and the proposed technique is validated through simulation and experimental results.