Design of 30 V High-Voltage Low-Power Radiation-Tolerant Analog Switch IC

In this study, a circuit- and device-level design was developed to improve the radiation tolerance of an analog switch integrated circuit (IC), which was fabricated using a commercial 0.35-
$\mu \text{m}$
bipolar–CMOS–DMOS (BCD) process. Both circuit- and layout-level approaches were used to improve the total ionizing dose (TID) tolerance of the IC. In the circuit-level approach, a level shift unit was used to reduce the amount of oxide traps. Under the layout-level approach, a ring gate and a doping ring were added to reduce the leakage current. Moreover, the optimum doping concentration of
$P_{\mathrm {WELL}}$
and length of the
$N_{+}$
drift zone were calculated for the n-MOSFET based on simulations to obtain the best device structure and improve the single-event burnout (SEB) tolerance. The radiation tolerance was tested experimentally. The results indicated that the newly designed 30-V high-voltage low-power analog switch chip had a TID tolerance >300 krad(Si) and a SEB tolerance >75 MeV cm
²
/mg, which are useful to improve the radiation-tolerant capability of high-voltage analog switches.