The Optimal Design of the Second-Order Generalized Integrator Phase-Locked Loop Under Power Voltage Distortion Conditions

Phase-locked loop (PLL) based on traditional second-order generalized integrator (SOGI) cannot obtain the voltage, frequency and phase information accurately when there are multiple harmonic interference and DC offset in grid voltage. To solve this problem, this paper proposes an improved PLL that can suppress harmonic and eliminate DC component to extract the synchronous signal accurately. First of all, based on the derivation of distorted grid voltage expression, the problem of fluctuation in extracting synchronous signal from three-phase unbalanced voltage with harmonic by traditional PLL is analyzed. Then, the design of improved PLL is proposed, which is composed of an improved second-order generalized integrator and a frequency correction component which can suppress harmonics and eliminate disturbances under the condition of grid voltage distortion, and has self-adaptability in large frequency offset. Determine the control parameters to ensure that the proposed PLL structure has a better rejection to harmonic distortion than previous approaches, and realize accurate tracking of grid fundamental frequency synchronization information. Finally, the behavior of the proposed system is verified with MATLAB/Simulink simulation and Hardware-in-Loop Experimental Platform which prove the proposed PLL can realize the synchronous tracking performance of grid frequency and phase quickly and accurately in the non-ideal grid environment, and the results are consistent with the theoretical analysis.