Estimation of the Trap Energy Characteristics of Row Hammer-Affected Cells in Gamma-Irradiated DDR4 DRAM

Dynamic random access memory (DRAM) bits can be erroneously flipped when the row near the error bits is repeatedly accessed with the activate and precharge commands in a process called row hammering. The trap at an Si–SiO
₂
interface has been previously reported as the leading cause of such errors. The number of row hammering required for flipping bits initially decreases and then saturates with the increases in the row precharge time (
$t_{\mathrm {RP}}$
). The DRAM timing parameter is the time interval between an activate command and a precharge command. This study uses the saturation
$t_{\mathrm {RP}}$
to estimate the electron emission time of the trap associated with a DRAM bit error. During
$t_{\mathrm {RP}}$
time, the traps at the Si–SiO
₂
interface emit the trapped electrons. There are more chances of emission as
$t_{\mathrm {RP}}$
increases, and less row hammering is needed. The emission time of a trapped electron is experimentally measured herein using commercial DDR4 components. The components are irradiated with gamma rays to induce the interface traps. The trap characteristics are then extracted without requiring an additional measurement setup with a device-level preparation. The trap energies with respect to the mid-band at the Si–SiO
₂
interface are 0.118–0.280 eV. The trap energies are distributed within approximately 5.6 kT energies at room temperature.