Design and implementation of high-precision timing module for NR terminals based on FPGA

With the rapid development of the modern communication industry, the vertical applications of the mobile network have put forward higher requirement for time synchronization. According to factors such as timing accuracy and cost, different application scenarios can adopt different timing methods. Network absolute time synchronization applies dedicated equipment, such as GNSS (Global Navigation Satellite System), or specific protocols, such as NTP (Network Time Protocol), PTP (Precision Time Protocol), SIB9 (System Information Block 9). There are requirements for timing accuracy up to microsecond level in the fields of IoT (Internet of things), autonomous driving, etc. The existing timing methods can hardly meet these demands. This paper studies the design and implementation of timing module based on TAP. This paper proposes a realization method by using hardware Kalman filter to cope with air interface delay jitter, and optimizes the efficiency of hardware processing link delay to meet the requirements of NR to improve the timing accuracy of TAP. The timing module is implemented based on FPGA, and the test results show that the timing accuracy of the timing module can reach to microsecond level.