Analytical Study of CNTFET based Ternary Logic Gate and Improved Impact on Power and Delay

Ternary Logic is the best and suitable alternative for binary logic. Binary Logic consists of 2 logic states 0 and 1 whereas ternary logic contains three states logic 0, 1 and 2. The advantages of Ternary over binary logic is it improves switching speed. This technique helps to reduce the computation steps, complexity and chip area. This paper is a study of CNTFET based ternary logic gate and improved impact on power and delay. A ternary NAND, NOR Gates are designed using Carbon nanotube transistors. The TNAND and TNOR gate circuits are simulated using the HSPICE tool. The performance parameters of the TLG using Carbon Nanotube FETs in terms of Delay are 621ps, 20.66ps, in terms of power are 0.47μW, 0.53μW