Energy Efficient Approximate MACs

Approximate computing or sacrificing computation efficiency for computational effort, has recently emerged as a promising design strategy. Several research studies have investigated approximate computation at both the software and hardware levels of abstraction over the last decade, with promising results. The multiply-add unit, the most basic and commonly used arithmetic block in digital systems has gotten a lot of attention for approximation at the hardware level of abstraction. We propose six Approximate MAC units (AMACU-1 to AMACU-6) for high-performance and energy-efficient approximate computing in this paper. The proposed AMACUs’ main design goal is to reduce the number of partial product stages to a minimum error rate. In terms of error efficiency and overhead analysis, the proposed AMACUs along with the conventional MAC and existing approximate MAC units are compared. It is noticed that, there is a considerable reduction in area and power by 64. 45AMACUs along with the existing approximate MAC units in an image smoothing application. Good PSNR and SSIM values were obtained.