Abstract:
State-of-the-art video coding technology, called Ver-satile Video Coding (VVC), provides double performance compared with the High Efficiency Video Coding (HEVC) for vide...Show MoreMetadata
Abstract:
State-of-the-art video coding technology, called Ver-satile Video Coding (VVC), provides double performance compared with the High Efficiency Video Coding (HEVC) for video sequences. Such video codecs can also provide better performance for still pictures. The complexity of VV C for still pictures, however, is very high for practical use. In order to reduce the encoding runtime, in this paper, we propose a combination of a fast coding configuration, an optimized implementation with parallel processing, and a fast algorithm for an intra mode decision. We also investigate the speedup factor of each proposed step. Finally, an average speedup factor of 710 times over default VTM is realized.
Published in: 2021 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference (APSIPA ASC)
Date of Conference: 14-17 December 2021
Date Added to IEEE Xplore: 03 February 2022
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Conference Location: Tokyo, Japan
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