Real-Valued Spreading Sequences for PSSS Based High-Speed Wireless Systems

In past years, Parallel Sequence Spread Spectrum (PSSS) has attracted significant attention as a modulation technique for wireless communication systems targeting data rates of 100 Gb/s and beyond. PSSS allows designing high-speed baseband processors, which can be partially implemented in the analog domain. It uses multiple analog-to-digital converters (ADCs) to sample the received baseband signal in parallel, significantly relaxing the sampling rate and ADC complexity. However, due to the sidelobe effects of bipolar
$m$
-sequences, PSSS shows lower performance than standard digital modulation schemes. This paper proposes real-valued PSSS spreading sequences with attenuated autocorrelation sidelobes. Such sequences show excellent bit error rate (BER) performance. Moreover, our sequences do not have length restrictions of 2
^m
– 1, like in the case of
$m$
-sequences, and reduce the chip area required to implement PSSS transceiver. The proposed sequences also reduce the peak-to-average power ratio (PAPR) of PSSS.