InP / CMOS co-integration for energy efficient sub-THz communication systems

The ever-growing needs of wireless communication call for the wide bandwidth offered by mm-wave and sub-THz frequencies. However, traditional CMOS technology becomes less efficient at those frequencies. Hence, its co-integration with alternative technologies such as III-V offers promising benefits in output power and efficiency. Those benefits are quantified thanks to an updated integrated power model covering power amplifier (PA), analog front-end and digital baseband. The state-of-the-art modeling approach is extended to different technologies and frequency ranges for the PA, and updated for digital baseband.Mathematical derivations explore the trade-off between number of antennas and PA output power. The optimal solution always has a balanced power consumption between front-end and PA components. Moreover, both number of antennas and total power consumption reduce when selecting a technology with increased PA efficiency, e.g., InP leads 2x power savings as compared to CMOS. To further reduce the system power consumption, a sub-array transmitter is considered, where each PA is connected to multiple antennas. It enables a 2D implementation relaxing the strong interconnect constraints at sub-THz frequencies. At the receive size, the improvement of LNA noise figure with technology is investigated and also leads to a reduction in number of antennas and power consumption.This promising co-integration approach has potential for power consumption and array size reduction. However, a number of integration challenges are open. Those are listed in order to guide future research into III-V/CMOS integration.