Variation-Tolerant Capacitive Array for Binarized Neural Network

In this letter, we propose the variation-tolerant capacitive binarized neural network using the capacitance of 2-terminal MANOS memory devices. The capacitance-voltage characteristic of the synaptic device is shifted by program or erase operation. Two saturated regions of
the C-V
curve are used for representing the weight of the binarized neural network (BNN), 1 and −1. Thus, the capacitance variation of the proposed synaptic device is much less than the conductance variation of the conventional synaptic devices. The effects of
${V}_{\text {th}}$
variation and memory window on accuracy are analyzed with CIFAR10 datasets. Our simulation result shows that the proposed capacitance-based BNN is much more robust to
${V}_{\text {th}}$
variation compared to the conductance-based BNN.