An FPGA Implementation of Givens Rotation Based Digital Architecture for Computing Eigenvalues of Asymmetric Matrix

This paper proposes the digital circuit design that performs the eigenvalue calculation of asymmetric matrices with realvalued elements. Eigenvalues are computed iteratively through the QR algorithm. In the QR algorithm, the input matrix is factorized into orthogonal Q and upper triangular R matrix, then the RQ product is calculated to obtain an iterated matrix. For a time-efficient QR decomposition process, the Givens Rotation (GR) Principle is utilized to benefit from the parallelization feature. Parallelization is managed by the Systolic Array (SA) architecture that is created by placing Givens Generation (GG) and Row Updates (RU) blocks in a triangle array. In this paper,
$4\times 4$
input matrix is used to create a TSA architecture including n-1 diagonal (GG), and
$(\mathrm{n}^{\ \ast}\ (\mathrm{n}-1))/2$
off-diagonal (RU) modules. In the results section, Givens Rotation is compared with the Gram Schmidt algorithm used in our previous study [1] in terms of error, and area usage.