Research of Thread Granularity Optimization Strategy for the Domestic DCU Accelerator

In the field of high-performance parallel computing, GPUs are typically used to handle large-scale compute-intensive and data-intensive tasks. The domestic DCU accelerator is a new generation of GPU accelerators developed independently by China, which uses CPU plus DCU heterogeneous programming in line with the current mainstream model of high-performance calculation heterogeneous programming and is more suitable for the deployment of highly intensive calculation applications. Thread granularity controls the number of threads performing parallel tasks and is an important factor affecting the parallel performance of a program. To further improve the operational efficiency under the premise of ensuring the accuracy, this paper takes the classical matrix multiplication as an example, and uses the thread block optimization strategy around row or column span and proximity calculations to study the variation of runtime, GFLPOS and acceleration ratio of the kernel functions with different thread granularity for the same matrix scale. The experiments were conducted on the domestic DCU accelerator, and the results showed that for matrix multiplications of 512*512 scale, the acceleration ratios of 1.13179, 1.168495, and 1.23378 were achieved for row span calculation, row proximity calculation, and column proximity calculation, respectively, compared with the naive parallel program. While for matrix multiplication of 1024*1024 scale, the acceleration ratios of 1.973046, 1.833173, 1.770419, and 1.746696 were achieved for row span calculation, column span calculation, row proximity calculation and column proximity calculation, respectively, compared with the naive parallel program.