Simulation of serial RRAM cell based on a Verilog-A compact model

Model-based simulation is one of the effective methods of scientific research. The inherent variability of resistive switching mechanisms has been an obstacle for the massive commercial implementation of the resistive random access memory (RRAM) devices. In this work, we simulated the resistive switching behavior based on an existing RRAM Verilog-A model, in which the simulated switching parameters demonstrated a satisfactory fit with the experimental data by introducing variability into the model. Moreover, a potential application of the troublesome variability was explored in the serial configuration of two RRAM devices, a cell which had been demonstrated to generate unpredictable bits with potential applications in hardware security. Realistic simulation of RRAM based circuits is key for the future development of RRAM based applications.