28-nm CMOS Resistor-Less Voltage Reference with Process Corner Compensation

A resistor-less CMOS reference generator exploiting transistors working in the subthreshold region is presented. Post-layout simulations using a 28-nm CMOS bulk technology show a temperature coefficient equal to 20.4 ppm/°C and a line sensitivity of 0.009 %/V, with an area occupation of only
$156.42\ \mu \mathrm{m}^{2}$
and a nominal current consumption around 20nA. Thanks to the adoption of a configurable active load, the circuit leads to 6.9× lower process sensitivity across corners.