Design of a Multi-State Memristive Memory

This paper presents an integrated memristive memory (RRAM) capable of storing 4 states in each memory location. RRAM advantages include non-volatility, low power consumption, high speed, and compatibility with existing CMOS technology. More importantly, RRAM has the potential to achieve multi-state storage on a single memory cell. Nevertheless, there is no multi-state RRAM integrated with CMOS technology that has been reported in literature. In this work, we propose a precise write-in and readout circuit for multi-state memristive memory. The memory is designed over a crossbar array architecture, a 1 transistor 1 memristor (1T1R) topology is employed to eliminate sneak-path currents. Data readout is carried out by two amplifiers and a 12-bit successive approximation analog to digital converter (SAR ADC). The RRAM successfully writes and reads 2-bit information by dividing the resistance of the memristor (memristance) into 4 states of $28\mathrm{k}\Omega\pm 2\mathrm{k}\Omega(11), 37\mathrm{k}\Omega \pm 3\mathrm{k}\Omega(10), 46\mathrm{k}\Omega\pm 4\mathrm{k}\Omega(01)$, and $56\mathrm{k}\Omega\pm 4\mathrm{k}\Omega(00)$. The total area of the proposed RRAM is 0.92 mm². The RRAM is prepared to be made in TSMC $0.18 \mu\mathrm{m}$ process.