Prototype of In-orbit Reconfigurable FPGA for PDHS

Programmability in satellite has become a stringent requirement to reprogram specific module or subsystem on board and to circumvent incapacitation against space radiation. A reconfigurable FPGA with multi-redundant configuration memories is used to realize these functionalities, as will be imparted within this paper. Actual application involves the configuration data from TTC being transferred to an FPGA inside PDHS which will configure an FPGA in certain payload. The prototype is done by transmitting a raw configuration file through serial communication from a PC to a controller device, an FPGA modified to emulate either JTAG and passive serial configuration schemes, then delivering the data to the targeted FPGA. In this paper, four configuration files are tested separately on both PS and JTAG; each of them programs the FPGA to serially deliver a passage of words in different language. If successfully configured, results are viewed in HTerm window and the generated waveforms are observed on Quartus SignalTap.