Formal Methods of FPGA Project Verification Flow

FPGA technology for developing safety-based PLCs for industrial applications (for example NPP I&C) became more popular. One of the main part of FPGA-based I&C system lifecycle is verification. FPGA Project Verification main stages are described. Verification influence on product development time, cost and quality are described. The article presents a new approach to performing the functional testing stage. This approach is based on the use of formal algebraic methods. The main advantage of using this approach is the increase in testing efficiency due to the use of the procedure for automatic generation of test cases. More than 10 years' experience of verification approaches of Radics LLC verification team is presented.