Design of Transient Enhanced LDO Circuit for GaN HEMT Gate Driver

A dynamic bias transient enhanced LDO (Low Dropout regulator) circuit for GaN gate driver is presented in this paper. With high-speed comparator, the bias current of LDO error amplifier can be switched dynamically when large load occurs. The reference voltage of high-speed comparator determines the response time of dynamic bias control circuit. The LDO has been designed in 0.18 μm BCD (Bipolar-CMOS-DMOS) process, simulation results show that the proposed LDO undershoot voltage is 16.6% of output voltage and the recovery time is less than 0.5us when load current is changed from 0mA to 20mA by frequency is 1MHZ.