Subcircuit Identification Method Based on Subgraph Isomorphism

With the development of integrated circuits, more and more transistors are integrated on one chip, and the more complex circuit structure on the chip increases the difficulty of the design. Therefore, it becomes important to automatically identify specific circuit modules from the netlist of a large-scale circuit. Subcircuit identification is essential in the applications for function verification, Layout versus Schematic (LVS) and logic synthesis in reverse engineering. In this paper, the topology feature expression of circuit structure is optimized for complex circuit detection in integrated circuits. Based on the fast subgraph isomorphism algorithm, the circuit identification with high accuracy and low computational complexity is realized. The efficiency of this method is verified by the experiments of subcircuit recognition in different scale circuits.