A Neuromorphic Brain Interface Based on RRAM Crossbar Arrays for High Throughput Real-Time Spike Sorting

Real-time spike sorting and processing are crucial for closed-loop brain–machine interfaces and neural prosthetics. Recent developments in high-density multielectrode arrays with hundreds of electrodes have enabled simultaneous recordings of spikes from a large number of neurons. However, the high channel count imposes stringent demands on real-time spike sorting hardware (HW) regarding data transmission bandwidth and computation complexity. Thus, it is necessary to develop a specialized real-time HW that can sort neural spikes on the fly with high throughputs while consuming minimal power. Here, we present a real-time, low latency spike sorting processor that utilizes high-density CuO
_x
resistive crossbars to implement in-memory spike sorting in a massively parallel manner. We developed a fabrication process that is compatible with CMOS back end of line (BEOL) integration. We extensively characterized switching characteristics and statistical variations of the CuO
_x
memory devices. In order to implement spike sorting with crossbar arrays, we developed a template matching-based spike sorting algorithm that can be directly mapped onto resistive random-access memory (RRAM) crossbars. By using synthetic and
in vivo
recordings of extracellular spikes, we experimentally demonstrated energy-efficient spike sorting with high accuracy. Our neuromorphic interface offers substantial improvements in area (
$\sim 1000\times $
less area), power (
$\sim 200\times $
less power), and latency (
$4.8~\mu \text{s}$
latency for sorting 100 channels) for real-time spike sorting compared to other HW implementations based on field-programmable gate arrays (FPGAs) and microcontrollers.